adcSet Struct Reference

Wrapper structure for AdcSet. More...

#include <src/c_include/pruio.h>

Collaboration diagram for adcSet:

Public Attributes
uint32	DeAd
	Subsystem address.
uint32	ClAd
	Clock address.
uint32	ClVa
	Clock value.
uint32	REVISION
	Register at offset 00h (chap. 12.5.1.1).
uint32	SYSCONFIG
	Register at offset 10h (chap. 12.5.1.2).
uint32	IRQSTATUS_RAW
	Register at offset 24h (chap. 12.5.1.3).
uint32	IRQSTATUS
	Register at offset 28h (chap. 12.5.1.4).
uint32	IRQENABLE_SET
	Register at offset 2Ch (chap. 12.5.1.5).
uint32	IRQENABLE_CLR
	Register at offset 30h (chap. 12.5.1.6).
uint32	IRQWAKEUP
	Register at offset 34h (chap. 12.5.1.7).
uint32	DMAENABLE_SET
	Register at offset 38h (chap. 12.5.1.8).
uint32	DMAENABLE_CLR
	Register at offset 3Ch (chap. 12.5.1.9).
uint32	CTRL
	Register at offset 40h (chap. 12.5.1.10).
uint32	ADCSTAT
	Register at offset 44h (chap. 12.5.1.11).
uint32	ADCRANGE
	Register at offset 48h (chap. 12.5.1.12).
uint32	ADC_CLKDIV
	Register at offset 4Ch (chap. 12.5.1.13).
uint32	ADC_MISC
	Register at offset 50h (chap. 12.5.1.14).
uint32	STEPENABLE
	Register at offset 54h (chap. 12.5.1.15).
uint32	IDLECONFIG
	Register at offset 58h (chap. 12.5.1.16).
struct adcSteps	St_p [16+1]
	step configuration (chap. 12.5.1.16 ff, charge step + 16 steps, by default steps 1 to 8 are used for AIN0 to AIN7).
uint32	FIFO0COUNT
	Register at offset E4h (chap. 12.5.1.51).
uint32	FIFO0THRESHOLD
	Register at offset E8h (chap. 12.5.1.52).
uint32	DMA0REQ
	Register at offset ECh (chap. 12.5.1.53).
uint32	FIFO1COUNT
	Register at offset F0h (chap. 12.5.1.54).
uint32	FIFO1THRESHOLD
	Register at offset F4h (chap. 12.5.1.55).
uint32	DMA1REQ
	Register at offset F8h (chap. 12.5.1.56).

Detailed Description

Wrapper structure for AdcSet.

Since

0.2

Definition at line 79 of file pruio.h.

---

The documentation for this struct was generated from the following file:

• src/c_include/pruio.h